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 C8051F331
25 MIPS, 8 kB Flash, 20-Pin Mixed-Signal MCU
Analog Peripherals
Comparator
High-Speed 8051 C Core
-
-
Programmable hysteresis and response time Configurable to generate interrupts or reset Low current (0.4 A)
Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks Up to 25 MIPS throughput with 25 MHz clock Expanded interrupt handler 768 bytes data RAM 8 kB Flash; in-system programmable in 512 byte sectors (512 bytes are reserved) 17 port I/O; all are 5 V tolerant Hardware SMBusTM (I2CTM compatible), SPITM, and UART serial ports available concurrently Programmable 16-bit counter/timer array with three capture/compare modules, WDT 4 general-purpose 16-bit counter/timers Real-time clock mode using PCA or timer and external clock source Two internal oscillators:
Memory On-Chip Debug
-
On-chip debug circuitry facilitates full speed, non-intrusive in-system debug (no emulator required) Provides breakpoints, single stepping, watchpoints Inspect/modify memory, registers, and stack Superior performance to emulation systems using ICE-chips, target pods, and sockets
Digital Peripherals
Supply Voltage: 2.7 to 3.6 V
-
Typical operating current: 6.4 mA at 25 MHz 9 A at 32 kHz Typical stop mode current: <0.1 A
Clock Sources
Temperature Range: -40 to +85 C
-25 MHz, 2% accuracy supports UART operation -80 kHz low frequency, low-power
External oscillator: Crystal, RC, C, or Clock (1 or 2 pin modes) Can switch between clock sources on-the-fly 20-pin QFN (standard lead and lead-free packages) Lead-free package: C8051F331-GM Standard package: C8051F331
Package Ordering Part Numbers
Port 0 Latch UART Timer 0, 1, 2, 3 3-Chnl PCA/ WDT SMBus SPI Port 1 Latch P 1 D r v P 0 D r v X B A R
VDD GND
Analog/Digital Power 8 kB FLASH 256 Byte SRAM 512 Byte XRAM
P0.0/VREF P0.1 P0.2/XTAL1 P0.3/XTAL2 P0.4/TX P0.5/RX P0.6/CNVST P0.7 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7
C2D
Debug HW Reset BrownOut
RST/C2CK
POR External Oscillator Circuit
8 0 5 1
XTAL1 XTAL2
24.5 MHz (2%) Internal Oscillator 80 kHz Internal Oscillator
System Clock
C o SFR Bus r e
CP0
+ -
Port 2 Latch
C2D
P2.0/C2D
Small Form Factor
Copyright (c) 2005 by Silicon Laboratories
5.5.2005
C8051F331
25 MIPS, 8 kB Flash, 20-Pin Mixed-Signal MCU Selected Electrical Specifications
(TA = -40 to +85 C, VDD = 2.7 V unless otherwise specified)
PARAMETER GLOBAL CHARACTERISTICS
Supply Voltage Supply Current with CPU active
CONDITIONS
MIN
2.7
TYP
6.4 0.36 20 9 <0.1
MAX
3.6
UNITS
V mA mA A A A MHz MHz kHz s A s A s A s A
Supply Current (shutdown) Clock Frequency Range
Clock = 25 MHz Clock = 1 MHz Clock = 80 kHz; VDD Monitor Disabled Clock = 32 kHz; VDD Monitor Disabled Oscillator off; VDD Monitor Disabled DC 24.0 Note 1 (CP+) - (CP-) = 100 mV (CP+) - (CP-) = 100 mV (CP+) - (CP-) = 100 mV (CP+) - (CP-) = 100 mV
25 24.5 80 0.1 7.6 0.18 3.2 0.32 1.3 1 0.4 25.0
INTERNAL OSCILLATORS
Frequency (OSC0) Frequency (OSC1)
COMPARATOR
Response Time Mode0 Current Consumption Mode0 Response Time Mode1 Current Consumption Mode1 Response Time Mode2 Current Consumption Mode2 Response Time Mode3 Current Consumption Mode3
Note 1: OSC1 can be calibrated in 2.5% steps using an internal calibration register.
Package Information
Bottom View
A A1 A2 A3 b D D2 E E2 e L N ND NE R AA BB CC DD MIN 0.80 0 0 0.18 2.00 2.00 0.45 MM TYP 0.90 0.02 0.65 0.25 0.23 4.00 2.15 4.00 2.15 0.5 0.55 20 5 5 0.435 0.435 0.18 0.18 MAX 1.00 0.05 1.00 0.30 2.35 2.35 0.65 10 6 7 8 9
C8051F330DK Development Kit
L 5
11 D2 E2 D2 2 12 R 13 14 15 17 16 4xe E
4 3
e
b
2 1 DETAIL 1 20 19
18
E2 2
0.09
4xe D
Side View
A2 A
DETAIL 1 AA BB
A3
A1
e
Small Form Factor
Copyright (c) 2005 by Silicon Laboratories
DD
CC
5.5.2005
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders


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